SoC and IP Design Engineer, Google Cloud
Description For SoC and IP Design Engineer, Google Cloud
Google Cloud is seeking a skilled SoC and IP Design Engineer to join their team working on cutting-edge silicon solutions. This role is part of the ML, Systems, & Cloud AI (MSCA) organization, which is responsible for designing and implementing hardware, software, and machine learning infrastructure for Google services and Google Cloud.
The position offers an opportunity to work on hardware that powers Google's direct-to-consumer products and services used by billions worldwide. You'll be involved in developing custom silicon solutions that drive innovation and performance improvements across Google's infrastructure.
As a SoC and IP Design Engineer, you'll be responsible for RTL development, system architecture design, and working with various verification and optimization tools. The role requires expertise in digital design principles, low-power techniques, and verification methodologies. You'll collaborate with cross-functional teams across multiple locations to deliver high-performance silicon solutions.
The position is ideal for someone with strong technical skills in hardware design and verification, combined with the ability to work in a collaborative environment. You'll be contributing to projects that directly impact Google's cloud infrastructure and machine learning capabilities, including work related to TPUs and other custom silicon solutions.
This is an excellent opportunity for an experienced engineer looking to work on challenging technical problems at scale, with access to cutting-edge technology and resources. The role offers the chance to shape the future of Google's hardware infrastructure while working with some of the industry's best engineers in a dynamic, innovative environment.
Responsibilities For SoC and IP Design Engineer, Google Cloud
- Define the System on a Chip (SoC)/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
- Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, SystemVerilog), function/performance simulation debug and Lint/CDC/FV/UPF checks
- Participate in synthesis, timing/power closure and Application-specific integrated circuit (ASIC) silicon bring-up
- Participate in test plan and coverage analysis of the block and SoC level verification
- Communicate and work with multi-disciplined and multi-site teams
Requirements For SoC and IP Design Engineer, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience with digital reasoning design principles, Register-Transfer Level (RTL) design concepts, and languages such as Verilog or SystemVerilog
- Experience with reasoning synthesis techniques to optimize RTL code, performance and power with low-power design techniques
- Experience with design sign-off and quality tools (e.g., Lint, CDC, etc.)
- Experience in reasoning design and debug with Design Verification (DV)
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