SoC Interface Architect, Silicon
Description For SoC Interface Architect, Silicon
Google is seeking a SoC Interface Architect to join their Devices & Services team, focusing on developing custom silicon solutions that power Google's direct-to-consumer products. This role combines hardware architecture expertise with low-speed interface design, playing a crucial part in Google's hardware innovation.
The position requires deep technical knowledge in electrical engineering, particularly in areas like I2C, UART, and SPI protocols. You'll be responsible for defining architecture specifications, analyzing performance trade-offs, and leading the development of low-speed interfaces. This role is perfect for someone who wants to impact millions of users through Google's hardware products.
As part of Google's mission to organize the world's information, you'll work with a team that combines AI, Software, and Hardware to create revolutionary user experiences. The role offers the opportunity to shape next-generation hardware experiences, focusing on performance, efficiency, and integration.
The ideal candidate will have strong experience in interface architecture and microarchitecture, with expertise in various protocols and GPIO design. You'll collaborate with system teams, lead technical initiatives, and contribute to Google's hardware innovation. This position offers the chance to work on cutting-edge technology while being part of a team that pushes boundaries in consumer hardware development.
Working at Google's Bengaluru office, you'll be part of a global team that's committed to technical excellence and innovation. The role combines technical leadership with hands-on architecture work, making it ideal for experienced engineers looking to impact consumer technology at scale.
Responsibilities For SoC Interface Architect, Silicon
- Define the requirements and author architecture specifications and programming guides
- Analyze performance, power, area, and cost trade-offs
- Perform Third-Party IP phones (3PIP) selection of low speed interface IPs and GPIO IPs
- Define and maintain SoC input/output (IO) map collaborating with the system team
- Lead and support throughout the life cycle of low speed interfaces development
Requirements For SoC Interface Architect, Silicon
- Bachelor's degree in Electrical Engineering or equivalent practical experience
- 3 years of experience in architecture, microarchitecture, design, or physical design of low speed interfaces or GPIO
- Experience in protocols such as I2C, UART, SPI
- Experience with I2S, JTAG, TDM, PDM, SoundWire, SPMI protocols (preferred)
- Experience in IO timing closure and GPIO circuit design (preferred)
- Experience in MIPI protocols (preferred)
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