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Static Timing Engineer, Cloud

Google is a global technology company that designs and develops cloud computing, search, software, and online advertising technologies.
$132,000 - $189,000
Cloud
Mid-Level Software Engineer
In-Person
5,000+ Employees
2+ years of experience
AI · Cloud

Description For Static Timing Engineer, Cloud

Google is seeking a Static Timing Engineer to join their Cloud team, focusing on shaping the future of AI/ML hardware acceleration. This role is crucial in developing TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. The position involves working on physical implementation of ASICs using advanced technology nodes, with responsibilities including constraint development, validation, and timing closure of complex high-performance compute ASICs.

The role sits within the ML, Systems, & Cloud AI (MSCA) organization, which is responsible for designing, implementing, and managing hardware, software, machine learning, and systems infrastructure for all Google services and Google Cloud. The team's work impacts billions of users worldwide through services like Search, YouTube, and Cloud products including Vertex AI.

As a Static Timing Engineer, you'll be developing static timing methodologies, margins, automation scripts, and documentation. You'll collaborate with architecture, logic design, and Design for Testing (DFT) teams to implement requirements. The position requires expertise in static timing analysis, debug capabilities, and experience with tools like Primetime or Tempus Tcl scripting.

The role offers competitive compensation, including a base salary range of $132,000-$189,000, plus bonus, equity, and comprehensive benefits. This is an excellent opportunity for someone passionate about hardware acceleration and AI/ML infrastructure, wanting to work on cutting-edge technology that powers some of the world's most widely-used services.

Last updated 3 days ago

Responsibilities For Static Timing Engineer, Cloud

  • Debug and resolve common STA or design rule issues like unconstrained endpoints, maximum transition, minimum period, or minimum pulse width violations
  • Perform sub chip static timing analysis, timing ECO creation for timing convergence, and final timing sign-off for ASIC tape outs
  • Utilize Perl, Python, Tcl, or Bash to create static timing flow automation scripts
  • Own and maintain Primetime STA flows

Requirements For Static Timing Engineer, Cloud

Python
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 2 years of experience in static timing analysis
  • Experience in Primetime or Tempus Tcl scripting and static timing analysis debug and problem solving
  • Experience in sub chip timing sign-off checklist criteria and overseeing final timing sign-off for ASICs

Benefits For Static Timing Engineer, Cloud

Medical Insurance
Equity
  • Bonus
  • Equity
  • Benefits package

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