Taro Logo

TPU Architect, Silicon

Google organizes the world's information and makes it universally accessible and useful, combining AI, Software, and Hardware to create helpful experiences.
New Taipei, Banqiao District, New Taipei City, Taiwan
Mid-Level Software Engineer
In-Person
5,000+ Employees
3+ years of experience
AI · Hardware

Description For TPU Architect, Silicon

Google is seeking a TPU Architect to join their silicon team, focusing on developing custom silicon solutions that power Google's direct-to-consumer products. This role combines hardware architecture expertise with machine learning acceleration, requiring deep understanding of computer architecture and ML workloads. The position involves analyzing and optimizing the Tensor Processing Unit (TPU) architecture, building analysis tools, and collaborating across teams to improve workload performance.

The ideal candidate will have strong background in computer architecture with experience in machine learning accelerators and compiler optimization. They will work at the intersection of hardware and AI, contributing to Google's mission of making information universally accessible through advanced computing solutions.

This is an exciting opportunity to shape the future of AI hardware at one of the world's leading technology companies. The role offers the chance to work on cutting-edge technology that impacts millions of users worldwide, while collaborating with top talent in both hardware and machine learning domains.

The position requires both technical depth in computer architecture and the ability to work across functions, combining analytical skills with practical implementation expertise. Success in this role means driving architectural innovations that improve the performance and efficiency of Google's ML accelerators while maintaining close collaboration with software, compiler, and implementation teams.

Last updated 5 hours ago

Responsibilities For TPU Architect, Silicon

  • Build up tools, flows, and dashboards for Tensor Processing Unit (TPU) power/performance analysis
  • Analyze important Machine Learning workloads, evaluate power and performance and propose architecture or compiler improvements
  • Analyze micro-architecture of the TPU, engage with the implementation team and propose power or performance optimization opportunities
  • Collaborate with cross-functional teams to improve the end to end workload analysis flows, including debugging and tracing

Requirements For TPU Architect, Silicon

Python
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
  • 3 years of experience with computer architecture concepts, with microarchitecture, cache hierarchy, pipelining, and memory subsystems
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with computer architecture (preferred)
  • Experience with Machine Learning Accelerators (preferred)
  • Experience in Machine Learning algorithms (preferred)
  • Experience in architecting and optimizing compilers (preferred)
  • Knowledge of compiler flows (e.g., TensorFlow) (preferred)

Benefits For TPU Architect, Silicon

Medical Insurance
Parental Leave
  • Equal opportunity employer
  • Accommodation for disabilities
  • Welcomes people with disabilities

Interested in this job?

Jobs Related To Google TPU Architect, Silicon

TPU RTL Design Engineer

Design and develop RTL for Google's TPU hardware, focusing on digital logic design, performance optimization, and integration of hardware components for machine learning acceleration.

Silicon Design Verification Engineer, TPU, Google Cloud

Silicon Design Verification Engineer position at Google Cloud, focusing on TPU technology and AI/ML hardware acceleration, requiring 4 years of verification methodology experience.

TPU Architect, Silicon

TPU Architect position at Google, focusing on designing and optimizing Tensor Processing Units for AI acceleration, requiring expertise in computer architecture and machine learning.

Formal Verification Engineer, Silicon, Google Cloud

Formal Verification Engineer position at Google Cloud, focusing on ASIC design verification and implementation of formal verification methodologies for complex hardware systems.

TPU RTL Design Engineer

Design and develop RTL for Google's TPU hardware, focusing on digital logic design, performance optimization, and integration of hardware components for machine learning acceleration.