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TPU Microarchitecture Design Lead

Google organizes the world's information and makes it universally accessible and useful, combining AI, Software, and Hardware to create helpful experiences.
$183,000 - $271,000
Machine Learning
Staff Software Engineer
In-Person
5,000+ Employees
8+ years of experience
AI · Hardware

Description For TPU Microarchitecture Design Lead

Google is seeking a TPU Microarchitecture Design Lead to spearhead the development of machine learning processors and accelerators for their Silicon SoCs. This is a senior technical leadership role combining hardware architecture, machine learning, and team management.

The position sits at the intersection of Google's AI and hardware initiatives, focusing on developing next-generation technologies that will power Google's machine learning infrastructure. As the TPU Microarchitecture Design Lead, you'll be responsible for defining and implementing sophisticated hardware architectures that enable faster and more efficient AI processing.

The role requires deep expertise in hardware design, particularly RTL development using Verilog/System Verilog, along with a strong understanding of microarchitecture principles. You'll lead a technical team, overseeing the entire development process from architecture definition through silicon bring-up. This includes managing complex projects, coordinating with cross-functional teams, and ensuring delivery of high-quality hardware solutions.

Google offers a competitive compensation package, including a base salary range of $183,000-$271,000, plus bonus, equity, and comprehensive benefits. The position is available in either Mountain View or San Diego, California, offering the opportunity to work at major tech hubs.

This is an exceptional opportunity for an experienced hardware architect who wants to make a significant impact on the future of AI computing. You'll work with cutting-edge technology, lead innovative projects, and contribute to Google's mission of making information universally accessible and useful through advanced computing solutions.

The ideal candidate will combine technical excellence with leadership skills, bringing experience in machine learning hardware, team management, and a track record of delivering complex hardware projects. You'll be part of Google's broader mission to push the boundaries of what's possible in AI computing, working with some of the industry's best minds in hardware and machine learning.

Last updated a day ago

Responsibilities For TPU Microarchitecture Design Lead

  • Lead a project team that delivers Machine Learning IPs for Google Silicon SoCs
  • Define microarchitecture details for Machine learning processors and accelerators along with specification of data flows and integration requirements for Subsystem Development
  • Oversee RTL development, and debug functional/performance simulations
  • Meet schedule commitments and provide support to customers
  • Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up

Requirements For TPU Microarchitecture Design Lead

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience
  • 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture
  • 4 years of experience in leading IP/SoC design teams
  • Experience with ARM-based SoCs, interconnects, and ASIC methodology

Benefits For TPU Microarchitecture Design Lead

Medical Insurance
Equity
401k
  • Medical Insurance
  • Equity
  • 401k

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