TPU RTL Design Engineer

Google is seeking a TPU RTL Design Engineer to join their team developing custom silicon solutions that power Google's direct-to-consumer products. This role combines hardware engineering with cutting-edge machine learning acceleration technology.

The position requires expertise in digital logic design, RTL development, and hardware optimization. You'll be working on Google's Tensor Processing Units (TPUs), which are custom-developed AI accelerators that power many of Google's machine learning applications. The role involves collaborating with architects, verification teams, and silicon validation teams to ensure the development of high-performance, power-efficient hardware solutions.

As a TPU RTL Design Engineer, you'll be responsible for developing and implementing design blocks, ensuring they meet power and performance specifications, and providing technical leadership on projects. The work involves using advanced simulation and emulation tools, optimizing designs for power efficiency, and contributing to the overall architecture of Google's AI hardware infrastructure.

The position offers competitive compensation ($156,000-$229,000 base salary) plus bonus, equity, and comprehensive benefits. You'll be working at Google's Mountain View headquarters, contributing to technology that impacts millions of users worldwide. This is an excellent opportunity for someone with strong hardware design experience who wants to work at the intersection of custom silicon development and machine learning acceleration.

The ideal candidate will have at least 5 years of experience with digital logic design and RTL development, preferably with knowledge of machine learning accelerators or similar high-performance designs. The role offers the chance to work on cutting-edge technology while collaborating with world-class engineers and researchers in Google's hardware team.