CPU Physical Design-Timing Engineer

Intel is seeking a CPU Physical Design-Timing Engineer to join their ACE India team, specifically working on the P-Core design team driving Intel's latest CPUs in cutting-edge process technology. This is a critical role focused on timing analysis and convergence of complex partitions.

The position involves working with high-performance computing systems, specifically on CPU designs running at over 5GHz frequencies. You'll be responsible for crucial timing analysis, ensuring proper setup and hold times across various high-volume manufacturing targets. The role requires deep expertise in Static Timing Analysis and close collaboration with System Design, Integration, and Floor Planning teams.

This is an excellent opportunity for experienced engineers who have a strong background in physical design and timing analysis. You'll be working with industry-leading tools from Synopsys and Cadence, and will need to bring expertise in Verilog/VHDL along with scripting capabilities in Tcl, Perl, and Python.

The role is part of Intel's Client Computing Group (CCG), which drives business strategy and product development for Intel's PC products and platforms. CCG is Intel's largest business unit and is at the forefront of delivering purposeful computing experiences that unlock people's potential. The team is committed to innovation and maintains a predictable cadence of leadership products.

Working at Intel offers the chance to be part of a company that's shaping the future of computing technology. You'll be working with cutting-edge technology and be part of a team that's pushing the boundaries of what's possible in CPU design. The position offers the opportunity to work on challenging technical problems while contributing to products that impact millions of users worldwide.