ASIC Engineer, Design Verification

Meta is seeking an ASIC Design Verification Engineer to join their Infrastructure organization. This role is perfect for recent graduates with a background in computer engineering or related fields. As a Design Verification Engineer, you'll be part of an innovative team developing cutting-edge ASIC solutions for Meta's data center applications.

Your responsibilities will include verification closure of design modules, developing UVM-based testbenches, and working with simulation and formal verification approaches. You'll collaborate closely with cross-functional teams including software, hardware, and ASIC design teams to ensure first-pass silicon success.

The ideal candidate should have experience with verification techniques, scripting languages, and understanding of computer architecture. You'll work with state-of-the-art tools and methodologies while contributing to Meta's infrastructure development. This role offers excellent growth opportunities and the chance to work on impactful projects at scale.

Meta offers a competitive compensation package including base salary ranging from $114,000 to $133,000 annually, plus bonus, equity, and comprehensive benefits. You'll be joining a company at the forefront of social technology, working on projects that connect billions of people worldwide and pushing the boundaries of AR/VR technology.

The position is available in either Sunnyvale, CA or Austin, TX, offering the opportunity to work from major tech hubs while collaborating with industry leaders. This is an excellent opportunity for recent graduates looking to launch their career in hardware engineering at one of the world's leading technology companies.