Meta is seeking an experienced ASIC Implementation Engineer to join their Infrastructure organization, focusing on front-end implementation from RTL to netlist. This role is critical in building efficient System on Chip (SoC) and IP solutions for data center applications. The position requires expertise in static verification, clock domain crossing analysis, and RTL design.
The role involves working with cutting-edge hardware technology at one of the world's leading tech companies. You'll be responsible for performing complex analyses including Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), and RTL Lint, while collaborating with various engineering teams to optimize and verify designs. This position offers an opportunity to work on sophisticated hardware solutions that power Meta's vast infrastructure.
The ideal candidate will bring 5+ years of experience in static verification tools, deep knowledge of SOC integration, and strong communication skills. You'll be working in either Sunnyvale, CA or Austin, TX, contributing to Meta's hardware infrastructure development. The compensation package is competitive, ranging from $142,000 to $203,000 annually, plus bonus, equity, and comprehensive benefits.
This role represents an excellent opportunity for experienced hardware engineers looking to make an impact at scale, working on technology that powers Meta's family of apps and future innovations in AR/VR. You'll be part of a team that's pushing the boundaries of hardware technology while working alongside some of the industry's best engineers.