Engineer, DEG Layout
Description For Engineer, DEG Layout
Micron Technology, a global leader in memory and semiconductor technologies, is seeking a Senior Layout Engineer for their DRAM Engineering Group in Hyderabad, India. With over 40 years of innovation experience, Micron has consistently redefined the boundaries of memory and storage solutions.
The role involves working with an exceptionally talented, passionate core team in India while collaborating with global teams across Micron's international footprint. As a Senior Layout Engineer, you'll be responsible for designing and developing critical analog, mixed-signal, and custom digital blocks, as well as providing full chip level integration support.
The position requires expertise in advanced CMOS process design, proficiency with industry-standard tools like Cadence VLE/VXL and Calibre DRC/LVS, and a strong understanding of analog layout fundamentals. You'll be working on cutting-edge projects that directly contribute to Micron's mission of transforming how the world uses information to enrich life for all.
This is an excellent opportunity for an experienced engineer to join a world-class team and work on innovative semiconductor technologies. The role offers exposure to international collaboration, working with teams in the US, Japan, and Germany, and the chance to mentor junior team members while contributing to significant technological advancements in the memory and storage industry.
Responsibilities For Engineer, DEG Layout
- Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support
- Perform layout verification like LVS/DRC/Antenna, quality check and documentation
- Responsible for on-time delivery of block-level layouts with acceptable quality
- Guide junior team-members in their execution of Sub block-level layouts & review their work
- Contribute to effective project-management
- Communicate with engineering teams in the US, Japan, and Germany
Requirements For Engineer, DEG Layout
- 3+ years experience in analog/custom layout design in advanced CMOS process
- Expertise in Cadence VLE/VXL and Calibre DRC/LVS
- Hands on experience of Critical Analog Layout design
- BE or MTech in Electronic/VLSI Engineering
- Good understanding of Analog Layout fundamentals
- Understanding layout effects on the circuit
- Excellent verbal and written communication skills
- Multiple Tape out support experience (preferred)
- Scripting and automation experience (preferred)
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