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ASIC Verification Engineer

NVIDIA is the world leader in accelerated computing, pioneering solutions in AI and digital twins.
Backend
Mid-Level Software Engineer
In-Person
5,000+ Employees
5+ years of experience
AI · Automotive

Description For ASIC Verification Engineer

NVIDIA's MMPLEX team is seeking an ASIC Verification Engineer to join their cutting-edge IP solutions development team. This role is crucial in delivering technology that powers multiple NVIDIA product lines, including GeForce and automotive applications. As an ASIC Verification Engineer, you'll be responsible for building and maintaining sophisticated verification environments using UVM methodology, developing test cases, and ensuring robust quality through comprehensive coverage analysis. The position offers an opportunity to work with world-leading IP technology and development processes at NVIDIA, the global leader in accelerated computing. The role combines technical expertise in verification methodologies with practical problem-solving skills, requiring proficiency in tools like VCS, Verdi, and Xcelium, along with strong programming capabilities in System Verilog and Python. This position is perfect for someone who wants to be at the forefront of hardware verification in a company that's transforming industries through AI and digital twins technology.

Last updated 7 days ago

Responsibilities For ASIC Verification Engineer

  • Read design specs and build corresponding testplan
  • Build block/IP testbench based on UVM methodology
  • Build test cases and regression flow
  • Triage failures in regression and help designer root cause bugs
  • Measure various metrics and monitor health
  • Analyze functional/code coverage result and identify coverage holes
  • Develop necessary tools to improve team's efficiency

Requirements For ASIC Verification Engineer

Python
  • BS / MS in electrical / computer engineering and related
  • 3+ years (MS) or 5+ years (BS) working experience
  • Proficient in using simulator and related tools (VCS, Verdi, Xcelium)
  • Deep understanding in System Verilog
  • Deep understanding in UVM
  • Experience building testbench from scratch and BFM modeling
  • Familiar with Python programming
  • Good communication skills in English

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