ASIC Verification Engineer - SOC Clocks Methodology
Description For ASIC Verification Engineer - SOC Clocks Methodology
NVIDIA, a global leader in accelerated computing, is seeking an ASIC Verification Engineer to join their Hardware SOC Clocking team. This role offers an exciting opportunity to work on cutting-edge technology that powers AI, gaming, and parallel computing innovations.
As an ASIC Verification Engineer, you'll be instrumental in developing and implementing methodologies for industry-leading SOCs. You'll work with state-of-the-art tools and technologies, utilizing Python, System Verilog, and UVM to create scalable verification solutions. The position offers hands-on experience with complex hardware systems and the chance to collaborate with talented architects, designers, and software engineers.
NVIDIA's culture emphasizes innovation, continuous learning, and making a lasting impact on the world. The company has revolutionized parallel computing and is at the forefront of AI research and development. They offer a supportive, diverse environment where creativity and technical excellence are highly valued.
The ideal candidate will bring strong technical skills in verification methodologies, coding expertise in Python, and a solid understanding of hardware design principles. This role provides an excellent opportunity to grow your career at a company that consistently pushes the boundaries of technology and offers competitive compensation and benefits.
Join NVIDIA to be part of a team that's shaping the future of computing and making a significant impact across multiple industries. You'll have the chance to work on challenging projects while contributing to technologies that are transforming the world.
Responsibilities For ASIC Verification Engineer - SOC Clocks Methodology
- Be an integral part of the Hardware SOC Clocking team
- Re-define and develop Methodologies for industry's leading SOCs
- Develop innovative methodologies that are scalable and re-usable to verify the micro-architecture and design
- Design and build new test benches and Flows in Python, System Verilog, UVM
- Work with architects, designers, and SW engineers
Requirements For ASIC Verification Engineer - SOC Clocks Methodology
- Masters or Bachelor's Degree in VLSI or Electronics Engineering with 1+ years of relevant industry experience
- Strong coding skills in Python or other industry-standard scripting languages
- Exposure to various Designs and Verification Flows at different testbenches
- Excellent debugging and analytical skills
- Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools)
- Good understanding of RTL design (Verilog)
- Experience in crafting test bench environments for unit and system-level verification
- Experience in UVM is a plus
- Great communication and teamwork skills
