Principal Software Engineer, RTL Optimization Tools
Description For Principal Software Engineer, RTL Optimization Tools
NVIDIA is seeking a Principal Software Engineer to join their RTL Optimization Tools team, focusing on developing cutting-edge internal EDA tools. This role combines advanced software development with hardware design expertise, working at the intersection of parallel computing, machine learning, and algorithmic optimization. The position offers unique opportunities to work on the latest processes and most advanced designs at one of technology's most desirable employers.
The role involves developing sophisticated tools that fuse advances in parallel computing, machine learning, and novel algorithms in C++. You'll be working on strategies and algorithms for large-scale RTL quality, timing, and power optimization, incorporating graph-based algorithms, AI, and feedback from RTL designers. The position requires deep understanding of DFT, clock distribution, power gating, and other SOC integration aspects.
What makes this role special is the intellectual freedom and broad technical exposure it offers. Working directly within a leading hardware company means focusing almost exclusively on cutting-edge processes and advanced designs, without being constrained by legacy support or niche roles. The team owns the entire process from discovery and invention of new optimization opportunities to developing solutions and working directly with design teams for deployment.
The position offers a competitive compensation package with a base salary range of $232,000 - $368,000 USD, plus equity and benefits. NVIDIA's commitment to diversity and inclusion, combined with their position as a leader in AI and accelerated computing, makes this an exceptional opportunity for experienced software engineers passionate about hardware optimization and innovation.
Responsibilities For Principal Software Engineer, RTL Optimization Tools
- Invent new methods for parallel, graph-based RTL traversal, analysis, and manipulation
- Devise strategies for analyzing impact of RTL changes on data path latency, power, and other aspects
- Explore high performance algorithms for clustering, min cost tree covering, and logic synthesis
- Explore use of LLMs, GNNs, GANs, and Reinforcement Learning for RTL modifications
- Own the process from discovery to deployment of optimization solutions
Requirements For Principal Software Engineer, RTL Optimization Tools
- MS or PhD in Electrical Engineering or Computer Science or equivalent experience
- 12+ years of relevant experience in CAD software and VLSI hardware design
- Demonstrated ability in software development with C++
- Fluency in RTL design, including Verilog and SystemVerilog code
- Familiarity with EDA techniques
- Strong communication and interpersonal skills
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