Senior ASIC Floorplan Design Engineer
Description For Senior ASIC Floorplan Design Engineer
NVIDIA, the world leader in accelerated computing, is seeking a Senior ASIC Floorplan Design Engineer to join their innovative team. This role offers a unique opportunity to shape the future of computing by designing and implementing world-leading SoCs and GPUs. The position involves working on cutting-edge products ranging from consumer graphics to self-driving cars and artificial intelligence applications.
As a Senior ASIC Floorplan Engineer, you'll collaborate with architects, design leads, and package leads to develop and optimize floorplans during early chip development. You'll be responsible for driving the area review process, solving timing and routing congestion issues, and building tools to optimize chip performance.
The ideal candidate should have a Masters Degree in a relevant field and at least 6 years of experience in hardware engineering. Strong expertise in VLSI, Computer Architecture, and programming languages like Python, Perl, and C/C++ is essential. Experience with CAD and physical design methodologies is crucial for success in this role.
NVIDIA offers a competitive compensation package with a base salary range of $168,000 to $368,000, plus equity and benefits. The company is committed to fostering diversity and maintains an inclusive work environment. This is an excellent opportunity to join a forward-thinking team that's pushing the boundaries of technology in AI, autonomous driving, and high-performance computing.
Responsibilities For Senior ASIC Floorplan Design Engineer
- Develop and optimize floorplans during early chip development
- Drive area review process and collaborate with ASIC design team
- Solve timing and routing congestion issues
- Build tools and improve existing infrastructure to optimize chip area and execution speed
Requirements For Senior ASIC Floorplan Design Engineer
- Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent experience
- 6+ years of relevant work experience
- Deep hardware engineering background with VLSI and/or Computer Architecture concentration
- Experience in Verilog, System Verilog or similar HVL
- Experience with CAD and physical design methodologies
- Strong communication and interpersonal skills
- Python, Perl and C/C++ programming language experience
Benefits For Senior ASIC Floorplan Design Engineer
- Equity
- Benefits package
