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Senior DFT Engineer

NVIDIA is the world leader in accelerated computing, pioneering GPU technology and revolutionizing parallel computing and AI.
$136,000 - $264,500
Embedded
Senior Software Engineer
Hybrid
5,000+ Employees
5+ years of experience
AI · Hardware

Description For Senior DFT Engineer

NVIDIA, a global leader in accelerated computing and AI technology, is seeking a Senior DFT Engineer to join their innovative team. This role sits at the intersection of hardware design and testing, focusing on Design-for-Test engineering for complex semiconductor chips.

The position offers an opportunity to work on groundbreaking innovations in DFT architecture, verification, and post-silicon validation. You'll be implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST, and scan compression, while collaborating with cross-functional teams to develop next-generation products.

NVIDIA has a rich history of reinvention, from inventing the GPU in 1999 to revolutionizing AI through GPU deep learning. The company maintains a culture of continuous learning and innovation, tackling challenges that matter to the world. This role offers the chance to be part of this dynamic environment while working on some of the industry's most complex semiconductor chips.

The ideal candidate will bring strong technical expertise in DFT domains, including scan test plans, BIST, fault modeling, and ATPG, combined with practical experience in silicon debug and bring-up. The role requires both technical depth and leadership skills, as you'll be mentoring junior engineers and making critical decisions about test design trade-offs.

With a competitive salary range of $136,000 - $264,500, plus equity and comprehensive benefits, NVIDIA offers excellent compensation. The hybrid work environment provides flexibility while maintaining collaborative opportunities. Join a team of brilliant and talented professionals working at the forefront of technology innovation.

Last updated 7 days ago

Responsibilities For Senior DFT Engineer

  • Own and work with cross functional teams implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan compression
  • Develop and deploy DFT methodologies for next generation products
  • Mentor junior engineers on test designs and trade-offs including cost and quality

Requirements For Senior DFT Engineer

Python
  • BSEE with 5+ years experience, MSEE with 3+ years experience, or PhD in DFT or related domains
  • Knowledge in defining scan test plans, BIST including memories and IOs, fault modeling, ATPG and fault simulation
  • Analytical skills in verification and validation of test patterns and logic on complex designs
  • Experience in RTL & clocks design, STA, place-n-route and power
  • Silicon debug and bring-up experience on ATE
  • Strong programming and scripting skills in Perl, Python or Tcl
  • Excellent written and oral communication skills

Benefits For Senior DFT Engineer

Medical Insurance
Equity
  • Competitive salaries
  • Comprehensive benefits package
  • Equity

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