Senior Mask Layout Design Engineer

NVIDIA, a global leader in accelerated computing and AI technology, is seeking a Senior Mask Layout Design Engineer to join their innovative team in Santa Clara. This role is crucial in developing high-speed mixed-signal circuit designs and represents an opportunity to work at the cutting edge of semiconductor technology.

NVIDIA has a rich history of innovation, having invented the GPU in 1999 which transformed PC gaming, computer graphics, and parallel computing. The company continues to push boundaries in AI and deep learning, maintaining its position as a pioneer in technological advancement.

As a Senior Mask Layout Design Engineer, you'll be working with state-of-the-art CMOS technologies, focusing on physical layout for mixed-signal functions including PLL's, high-speed I/O circuits, and ESD structures. You'll collaborate with ASIC and mixed-signal engineers, applying your expertise in floor planning and custom layout while ensuring compliance with design rules.

The ideal candidate brings 8+ years of mask design experience, with specific expertise in FinFET technology and TSMC N5/N4/N3 processes. Your deep understanding of analog circuit layout concepts and proficiency with Cadence tools will be essential for success in this role.

This position offers competitive compensation, with a base salary range of $124,000 to $230,000, plus equity and comprehensive benefits. You'll be joining a company that values diversity and innovation, working on projects that directly impact the future of computing and AI technology.

At NVIDIA, you'll be part of a learning organization that constantly evolves, tackling challenging opportunities that matter to the world. This role represents a chance to contribute to groundbreaking developments in semiconductor technology while working with some of the industry's brightest minds.