ASIC Timing and Methodology Engineer

Qualcomm Technologies, Inc. is seeking an experienced ASIC Timing and Methodology Engineer to join their innovative semiconductor design team. This role represents a unique opportunity to work with cutting-edge technology in 5nm, 4nm, and beyond process nodes, focusing on critical timing analysis for mobile, compute, automotive, and IoT markets.

The position offers an exciting challenge at the intersection of digital and analog design, requiring expertise in advanced timing methodologies and tools. As a Timing Engineer, you'll be responsible for ensuring the timing integrity of complex SOC designs, working with state-of-the-art tools and methodologies. The role involves close collaboration with physical design teams, CAD teams, and IP teams, making it an excellent opportunity for someone who enjoys cross-functional teamwork.

The compensation package is highly competitive, ranging from $140,000 to $210,000, complemented by annual bonuses and RSU grants. Qualcomm offers comprehensive benefits including medical, dental, and vision coverage, along with 401(k), mental health support, and parental leave benefits.

This role is ideal for candidates with strong technical backgrounds in ASIC design and timing analysis, combined with programming skills in Python, Perl, TCL, and C++. The position requires at least 4 years of experience with a Bachelor's degree (or equivalent combinations with advanced degrees), and offers significant opportunity for professional growth and impact in a leading semiconductor company.

Working at Qualcomm's San Diego location, you'll be part of a team driving innovation in semiconductor design, with access to the latest tools and technologies. The company's strong focus on employee development, comprehensive benefits, and position at the forefront of wireless technology innovation makes this an excellent opportunity for career growth in the semiconductor industry.