Display ASIC Design Verification Engineer
Description For Display ASIC Design Verification Engineer
Join Qualcomm's display design team as an ASIC Design Verification engineer, where you'll be part of a highly experienced multi-disciplinary team working on next-generation Display Processors. This role offers an opportunity to work with industry-leading edge HW Design Verification methodology and processes, contributing to technology that delivers vivid visual experiences across mobile, compute, automotive, and IoT markets.
As a Display ASIC Design Verification Engineer, you'll be responsible for ensuring the functional correctness and performance of complex display processing systems. The role combines hardware verification expertise with software development skills, requiring proficiency in languages like SystemVerilog, C++, and Python. You'll work closely with cross-functional teams to develop and execute verification strategies, create test benches, and ensure robust quality assurance of ASIC designs.
Qualcomm offers an exceptional work environment with comprehensive benefits, including world-class health coverage, financial planning support, and wellness programs. The company's commitment to innovation and technological advancement makes it an ideal place for engineers looking to make a significant impact in the semiconductor industry. You'll have access to continuous learning opportunities, tuition reimbursement, and mentorship programs to support your professional growth.
The position offers the chance to work on cutting-edge display technology that powers devices across multiple industries, making it an exciting opportunity for someone passionate about hardware verification and digital design. With Qualcomm's global presence and industry leadership, this role provides excellent career growth potential and the opportunity to work with some of the brightest minds in the technology sector.
Responsibilities For Display ASIC Design Verification Engineer
- Contribute to feature, core and sub-system verification for next generation ASICs
- Work with design team to define verification requirements
- Participate in test plan development, execution and verification closure
- Create/maintain test benches, assertions, and functional coverage models
- Implement flows to automate development processes
- Debug throughout the development cycle
- Define, model, design, optimize, verify, validate IP development
- Create architectures and system simulations based on requirements
- Collaborate across teams on implementation strategy
- Write detailed technical documentation
Requirements For Display ASIC Design Verification Engineer
- Bachelor's degree in Science, Engineering, or related field
- Strong analytical and debugging skills
- Good working experience with C/C++
- Strong knowledge of Object Oriented Programming (OOP) concepts
- Experience with SystemVerilog testbench (UVM), and/or SystemC
- Knowledge of Verilog and SystemVerilog
- Knowledge of digital circuits and event-driven simulators
- Experience with Perl, Python, TCL, tcsh, and GNU Make
- Strong communication skills
- Detail oriented with ability to plan and prioritize tasks
Benefits For Display ASIC Design Verification Engineer
- World-class health coverage for employees and dependents
- Financial planning and security programs
- Emotional and mental health support
- Wellbeing programs and resources
- Tuition reimbursement
- Mentorship programs
- Continuous learning and development programs
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