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Physical Design Engineer, Sr Lead

A leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation.
Backend
Staff Software Engineer
In-Person
5,000+ Employees
5+ years of experience
Hardware · AI

Description For Physical Design Engineer, Sr Lead

Qualcomm, a global leader in technology innovation, is seeking a Physical Design Engineer, Sr Lead to join their team in Bangalore. This role represents an opportunity to work at the forefront of hardware engineering and chip design at one of the world's most influential semiconductor companies.

The position requires a seasoned professional with at least 5 years of experience in hardware engineering, specifically in Physical Design and Place-and-Route (PNR) implementation using the latest technology nodes. You'll be responsible for complete ownership of PNR implementation, including critical aspects like floorplanning, placement, Clock Tree Synthesis (CTS), and post-route optimization.

As a Senior Lead at Qualcomm, you'll be working with cutting-edge technology in chip design, collaborating with cross-functional teams to develop solutions that power the next generation of mobile and wireless technologies. The role offers exposure to the latest semiconductor nodes (4nm/5nm/7nm/10nm) and requires expertise in various signoff domains including STA, Power analysis, and low power verification.

Qualcomm offers an exceptional benefits package including comprehensive health coverage, financial planning assistance, continuous learning opportunities, and wellbeing programs. The company's commitment to innovation and technological advancement makes it an ideal place for hardware engineers looking to make a significant impact in the semiconductor industry.

The position combines technical leadership with hands-on engineering work, requiring both deep technical knowledge and the ability to drive complex projects to completion. You'll be part of a company that's at the forefront of 5G, AI, and mobile computing technologies, working on products that impact billions of users worldwide.

Last updated a day ago

Responsibilities For Physical Design Engineer, Sr Lead

  • Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes
  • Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc)
  • Plan, design, optimize, verify, and test electronic systems
  • Collaborate with cross-functional teams to develop solutions and meet performance requirements

Requirements For Physical Design Engineer, Sr Lead

Linux
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering or related field with 3+ years experience
  • 5+ years Hardware Engineering experience
  • 5+ years experience with PNR flow in latest tech nodes (4nm/5nm/7nm/10nm)
  • Good hands-on experience on Floorplanning, PNR and STA flows
  • Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization
  • Good understanding on signoff domains– LEC/CLP/PDN knowledge
  • Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting

Benefits For Physical Design Engineer, Sr Lead

Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Assistance
401k
Education Budget
  • World-class health coverage for employees and eligible dependents
  • Financial programs to build and prepare for secure future
  • Emotional/mental strength and resilience support
  • Wellbeing programs
  • Continuous learning and development programs
  • Tuition reimbursement
  • Mentorship programs

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