Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL) are seeking a Senior Memory Controller Micro-Architect to join their System IP team. This role focuses on developing proprietary coherent interconnect and memory controllers for high-volume products across mobile, automotive, and custom market segments.
As a Principal Engineer, you'll lead the design and development of advanced memory controllers for cutting-edge technologies including LPDDR5, LPDDR6, and Processing in Memory (PIM). The position offers significant ownership over memory-controller related micro-architecture, RTL design, and performance/power optimization. You'll work within a global task force, collaborating with various teams to transform innovative ideas into next-generation memory technologies.
The role requires deep technical expertise in memory controller design, with responsibilities spanning from early architectural exploration through micro-architectural research and RTL delivery. You'll ensure design quality through various analysis tools while meeting performance, power, and area (PPA) goals. The position offers competitive compensation ($216,521 - $359,527) and comprehensive benefits including medical, dental, vision, 401(k), and educational assistance.
This is an opportunity to work with a diverse team of talented individuals at a well-established global company, offering limitless room for exploration, innovation, and technical growth. The team focuses on delivering system modeling capabilities for world-class memory subsystems, with architecture scalability at the forefront of design focus.
The ideal candidate will bring 16-20+ years of experience (depending on education level), strong expertise in memory technologies, and proven success in driving architecture through RTL design for high-performance digital systems. This role is perfect for someone passionate about logic design and innovation, with strong collaborative skills and the ability to navigate a fast-paced, global team environment.