FPGA/ASIC Design Engineer (Silicon Engineering)
Description For FPGA/ASIC Design Engineer (Silicon Engineering)
SpaceX is at the forefront of space exploration and satellite communications technology, with a bold mission to enable human life on Mars. As part of this journey, they're building Starlink, the world's most advanced broadband internet system through a vast satellite constellation. The FPGA/ASIC Design Engineer role is crucial in developing the next-generation chips that power this revolutionary network.
The position offers an opportunity to work with world-class cross-disciplinary teams in systems, firmware, architecture, design, validation, and product engineering. You'll be developing cutting-edge FPGAs and ASICs for both space and ground infrastructures, directly contributing to making connectivity available in previously underserved areas around the globe.
The role demands expertise in digital design, particularly in implementing complex SoC blocks and integration tasks. You'll be involved in the entire design process, from high-level architectural discussions to detailed implementation and validation. Key responsibilities include optimizing designs for power, performance, and area, working with backend teams, and bringing up designs in the lab.
This is an ideal position for someone who combines technical expertise with a passion for space technology and global connectivity. The role offers competitive compensation ($122,500 - $170,000 based on level) and comprehensive benefits including equity opportunities, medical coverage, and retirement plans. Working at SpaceX means being part of a team that's literally reaching for the stars while solving real-world connectivity challenges.
The position requires a bachelor's degree and at least 2 years of ASIC/FPGA experience. Due to ITAR requirements, candidates must be U.S. citizens, permanent residents, or eligible for required authorizations. The role demands flexibility with working hours and a commitment to excellence in a fast-paced, dynamic environment.
Responsibilities For FPGA/ASIC Design Engineer (Silicon Engineering)
- Design digital ASICs and/or FPGAs for Starlink projects, implementing complex SoC blocks and SoC integration tasks
- Implement or integrate design blocks using Verilog/SystemVerilog
- Optimize designs for power, performance and area
- Participate in the design process from high-level concepts to micro architecture
- Participate in all phases of ASIC and/or FPGA design flow
- Work with ASIC backend/implementation teams
- Bring-up and validate ASICs and FPGAs in the lab
- Collaborate with software engineers in developing production software
Requirements For FPGA/ASIC Design Engineer (Silicon Engineering)
- Bachelor's degree in electrical engineering, computer engineering or computer science
- 2+ years of experience working with ASICs or FPGAs
- Experience designing digital ASICs and/or FPGAs
- Experience writing RTL in Verilog or SystemVerilog
- Experience with EDA tools
- Experience with scripting
- Must be willing to work extended hours and weekends as needed
- Must be a U.S. citizen, permanent resident, refugee, or asylee (ITAR requirement)
Benefits For FPGA/ASIC Design Engineer (Silicon Engineering)
- Medical, vision, and dental coverage
- 401(k) retirement plan
- Short & long-term disability insurance
- Life insurance
- Paid parental leave
- 3 weeks paid vacation
- 10+ paid holidays per year
- 5 days sick leave per year
- Stock options
- Employee Stock Purchase Plan
- Long-term incentives
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