FPGA/ASIC Verification Engineer (Silicon Engineering)
Description For FPGA/ASIC Verification Engineer (Silicon Engineering)
SpaceX, a pioneering space exploration company, is seeking a talented FPGA/ASIC Verification Engineer to join their Silicon Engineering team in Sunnyvale, CA. This role is crucial in developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures worldwide, particularly supporting the Starlink satellite constellation project.
The position offers an exciting opportunity to work alongside world-class cross-disciplinary teams, including systems, firmware, architecture, design, validation, and product engineering specialists. You'll be directly contributing to SpaceX's mission of making humanity a multi-planetary species while also helping to provide reliable internet access globally through the Starlink network.
As an FPGA/ASIC Verification Engineer, you'll be responsible for comprehensive verification processes, from writing test plans to implementing complex testbench infrastructures using SystemVerilog and UVM. The role requires expertise in automation using Python and MATLAB, and involves both pre-silicon verification and post-silicon validation.
The compensation package is competitive, ranging from $130,000 to $180,000 per year, depending on experience level. SpaceX offers comprehensive benefits including medical coverage, 401(k), stock options, and generous paid time off. This is an excellent opportunity for someone passionate about space technology and hardware engineering to make a significant impact on groundbreaking projects.
The ideal candidate will have at least 2 years of experience in design verification and test bench development, with a bachelor's degree in electrical engineering, computer science, or computer engineering. Strong problem-solving skills, expertise in verification methodologies, and the ability to work in a dynamic environment are essential for success in this role.
Responsibilities For FPGA/ASIC Verification Engineer (Silicon Engineering)
- Responsible for digital ASIC and/or FPGA verification at block and system level
- Write and review test plans, develop test harnesses and test sequences
- Develop SystemVerilog testbench infrastructure (both UVM and non-UVM) for testing designs, including DSP blocks
- Responsible for test plan execution, running regressions, code and functional coverage closure
- Automate test case generation by using Python and MATLAB programs
- Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
- Be a hands-on self-starter who can execute the steps required to fully verify complex digital designs
Requirements For FPGA/ASIC Verification Engineer (Silicon Engineering)
- Bachelor's degree in electrical engineering, computer science or computer engineering
- 2+ years of experience with design verification and test bench development
- Must be willing to work extended hours and weekends as needed
- Must be a U.S. citizen, permanent resident, refugee, or asylee (ITAR requirement)
Benefits For FPGA/ASIC Verification Engineer (Silicon Engineering)
- Medical, vision, and dental coverage
- 401(k) retirement plan
- Short & long-term disability insurance
- Life insurance
- Paid parental leave
- 3 weeks paid vacation
- 10+ paid holidays per year
- 5 days sick leave per year
- Stock options
- Employee Stock Purchase Plan
- Long-term incentives
- Potential discretionary bonuses
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