ASIC Design Engineer
Description For ASIC Design Engineer
Amazon Devices is seeking an exceptional ASIC Design Engineer to join their innovative SOC development team. This role is part of the team that built the groundbreaking Silicon IP AZ1 Neural Edge powering the latest generation of Echo devices. As an ASIC Design Engineer, you'll be at the forefront of developing next-generation SOCs for machine learning-enabled consumer products.
The position offers an exciting opportunity to work on cutting-edge technology, integrating industry standard and custom hardware IP into SoCs that will accelerate applications in machine learning, computer vision, and robotics. You'll collaborate closely with System Architects, SoC architects, IP developers, and physical design teams to create solutions that meet power, performance, and area goals for Amazon devices.
Key responsibilities include developing chip level and subsystem level netlists, converting chip specifications into RTL, and designing various system components including interfaces, power management, and clocking systems. You'll also play a crucial role in developing and implementing methodologies for I/O, DFT, Debug, and Power Management.
The ideal candidate brings 5+ years of semiconductor design experience, strong expertise in RTL coding, and a proven track record in full-chip and subsystem integration. This role offers the chance to work with advanced design nodes and contribute to high-volume SoCs that will power next-generation Amazon devices.
Join Amazon's culture of innovation where you'll work hard, have fun, and make history as part of a team developing revolutionary architecture for consumer electronics. This position provides an excellent opportunity for technical leadership and mentorship while working on products that directly impact millions of customers worldwide.
Responsibilities For ASIC Design Engineer
- Integrate industry standard and custom hardware IP into SoCs
- Work with System Architects and SoC architects
- Convert Chip Spec into RTL using internal and external IPs
- Review Architecture and Design of custom IPs
- Design & Develop RTL for Interfaces, Power Management, Clocking, Reset, Test & Debug
- Develop methodologies for I/O, DFT, Debug, Clocking and Power Management
- Provide technical leadership and mentorship
Requirements For ASIC Design Engineer
- BS degree or higher in EE or CE or CS
- 5+ years of practical semiconductor design experience
- Experience in micro-architecture definition
- Experience in RTL coding (Verilog/System Verilog)
- Experience in closing full-chip and subsystem timing
- Experience with DFT tools for scan and BIST insertion
- Excellent verbal and written communication skills
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