Senior ASIC Design Engineer, Project Kuiper

A global technology company leading in e-commerce, cloud computing, digital streaming, and artificial intelligence.
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
7+ years of experience
Space

Description For Senior ASIC Design Engineer, Project Kuiper

Project Kuiper is an ambitious initiative by Amazon to launch a constellation of Low Earth Orbit satellites aimed at providing high-speed broadband connectivity to underserved communities worldwide. As a Senior ASIC Design Engineer, you'll be part of the team responsible for defining and implementing digital chip SOCs for satellite communications.

The role involves working on cutting-edge wireless solutions with minimal legacy constraints. You'll collaborate with system architects to develop world-class SOC and IP blocks, focusing on power efficiency, area optimization, and performance targets. Key responsibilities include SoC subsystem configuration and integration, floor planning, support logic development, and working with 3rd party IP blocks.

You'll be involved in gate-level simulation, developing and maintaining comprehensive test plans for verifying ASIC functionality and timing. The position requires strong debugging skills and the ability to work across multiple teams, facilitating seamless integration between Firmware, RTL, Platform Software, and Platform Drivers.

This is a unique opportunity to work on groundbreaking technology that will have a global impact. The role combines technical expertise in ASIC design with the challenge of developing solutions for space-based communications systems. You'll be part of Amazon's innovative Project Kuiper team, working to bridge the digital divide through advanced satellite technology.

Note: Due to export control laws, candidates must be a U.S. citizen, national, permanent resident, or have refugee/asylum status.

Last updated 9 hours ago

Responsibilities For Senior ASIC Design Engineer, Project Kuiper

  • Develop and maintain gate-level simulation test plans
  • Analyze simulation results and debug logic errors
  • Work with design and verification engineers
  • Facilitate integration across Firmware, RTL, Platform Software, and Platform Drivers
  • Develop Debug tools for RTL Emulation and silicon bring-up
  • Define and configure SoC Subsystems
  • Contribute to SoC floor planning
  • Configure and integrate 3rd party IP blocks

Requirements For Senior ASIC Design Engineer, Project Kuiper

  • 7+ years of non-internship professional software development experience
  • 7+ years of programming with at least one software programming language
  • 7+ years of leading design or architecture experience
  • Experience as a mentor, tech lead or leading an engineering team
  • 7+ years of digital design experience, preferably in SoC design and implementation
  • Must be a U.S. citizen, national, permanent resident, or have refugee/asylum status

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