AWS Annapurna Labs develops cutting-edge silicon solutions for machine learning accelerator servers, pushing the boundaries of what's possible in cloud computing. As an HBM ASIC Test Engineer, you'll be at the forefront of semiconductor testing, working with advanced High Bandwidth Memory (HBM) DRAM interfaces and memory stack testing. You'll optimize SOC phy to DRAM base die training, going beyond JEDEC specs to achieve maximum bandwidth through customized training and vendor-specific sequences.
The role combines traditional ATE platform testing with mission profile testing, requiring expertise in structural testing, external controlling ICs, and server management software. You'll work with virtualized machines and microcontrollers, ensuring our silicon performs optimally in real-world server environments. Your responsibilities include analyzing eye diagrams, timing margins, and implementing lane repair and optimization strategies.
Working within AWS Utility Computing (UC), you'll be part of the team that powers foundational services like Amazon S3 and EC2. Annapurna Labs focuses on creating innovative silicon and software solutions that push the boundaries of cloud computing. You'll have access to state-of-the-art tools and mentorship, working in a supportive environment that values knowledge-sharing and career growth.
The position offers the opportunity to work with a diverse, inclusive team that embraces continuous learning. You'll benefit from Amazon's work-life harmony approach and have access to various career development resources, including employee-led affinity groups and mentorship programs. Join us in solving unprecedented technical challenges and helping our customers innovate in ways previously thought impossible.