CPU Cache Microarchitect/RTL Engineer

Apple designs high-performance, low power microprocessors that power innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac.
Waltham, MA, USA
Hardware
Staff Software Engineer
In-Person
5,000+ Employees
10+ years of experience
Hardware

Description For CPU Cache Microarchitect/RTL Engineer

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it.

Apple's Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems.

As a CPU Cache Microarchitect/RTL Engineer, you will be responsible for micro-architecture development and specification, RTL ownership, verification support, performance exploration, and design delivery. You'll work with cutting-edge technology in CPU cache subsystems, applying expertise in areas like coherence protocols, high-performance design techniques, memory subsystem optimization, and power management strategies.

The role combines deep technical knowledge with hands-on engineering, requiring both architectural vision and practical implementation skills. You'll collaborate with multi-functional teams to create innovative solutions that power Apple's next generation of products. This is an opportunity to make a significant impact on Apple's silicon technology while working with some of the industry's best engineers.

Last updated 6 days ago

Responsibilities For CPU Cache Microarchitect/RTL Engineer

  • Micro-architecture development and specification - from early high-level architectural exploration through detailed specification
  • RTL ownership - development, assessment and refinement of RTL design
  • Support verification team in test bench development and formal methods
  • Performance exploration and correlation
  • Work with multi-functional engineering team to implement and verify physical design

Requirements For CPU Cache Microarchitect/RTL Engineer

Python
  • Minimum BS and 10+ years of relevant industry experience
  • Knowledge of microprocessor architecture
  • Knowledge of Verilog and/or VHDL
  • Experience with simulators and waveform debugging tools
  • Knowledge of logic design principles along with timing and power implications

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