CPU Microarchitect/RTL Engineer - Fetch, Out of Order

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. The Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac.

As a CPU Microarchitect/RTL Engineer, you will be responsible for driving architecture and RTL development of CPU front-end and/or out-of-order subsystem for performant cores. The role involves micro-architecture development, RTL ownership, verification support, and performance optimization.

Key Responsibilities:

• Develop and specify micro-architecture from early exploration to detailed specifications
• Own RTL development and refinement to meet power, performance, and area goals
• Support verification team in test bench development and simulation
• Explore high-performance strategies and verify RTL design performance
• Collaborate with engineering teams on physical design implementation

Required Qualifications:

• BS degree with 3+ years of relevant industry experience
• Strong knowledge of microprocessor architecture
• Proficiency in Verilog/VHDL
• Experience with simulation tools and debugging
• Understanding of logic design principles

Preferred Skills:

• Expertise in instruction fetch/decode, branch prediction, scheduling
• Knowledge of low power microarchitecture techniques
• Experience with C/C++ programming
• Familiarity with Python or Perl

Benefits include comprehensive medical/dental coverage, retirement benefits, stock programs, education reimbursement, and potential for bonuses and relocation assistance. Base pay ranges from $143,100 to $264,200 depending on qualifications.

Join Apple's innovative hardware team and help deliver the next groundbreaking products that millions of people rely on daily.