Design Verification Engineer

A technology company that crafts products that enrich people's lives.
$115,700 - $174,200
Backend
Mid-Level Software Engineer
In-Person
5,000+ Employees
3+ years of experience
Hardware

Description For Design Verification Engineer

At Apple, we work every single day to craft products that enrich people's lives. As a Design Verification Engineer, you'll join our Hardware team to work on challenges that no one has solved yet. This role focuses on ensuring bug-free first silicon for IP designs, involving all phases of pre-silicon verification.

You'll be responsible for establishing design verification methodology, test-plan development, and verification environment development. Your work will include creating stimulus and checkers, test-writing, debugging, coverage analysis, and sign-off for RTL freeze and tape-out.

The role offers competitive compensation ranging from $115,700 to $174,200, along with comprehensive benefits including medical coverage, retirement benefits, and stock options. You'll work with cutting-edge technology in Apple's San Diego office, contributing to products that impact millions of users worldwide.

Key responsibilities include developing detailed test plans, verification methodologies, and environments suitable for IP designs. You'll work closely with analog teams to ensure overall bug-free IP design and track verification progress using various metrics.

The ideal candidate should have a BS degree in a technical field, strong knowledge of SystemVerilog and UVM, and experience with verification tools and methodologies. Experience with serial protocols like PCIe or USB is highly valued, as is expertise in scripting languages such as Python, Perl, or TCL.

Join Apple's Hardware team and be part of creating the next generation of innovative products that delight and inspire users worldwide. Your work will directly impact the quality and reliability of Apple's hardware solutions, making this an exciting opportunity for a passionate verification engineer.

Last updated 8 days ago

Responsibilities For Design Verification Engineer

  • Develop detailed test and coverage plans based on the micro-architecture
  • Develop verification environment and methodology
  • Execute verification plans including design bring-up
  • Develop block, IP and SoC level test-benches
  • Track and report Design Verification progress

Requirements For Design Verification Engineer

Python
Java
  • BS degree in technical subject area
  • Solid understanding of SystemVerilog test-bench language and UVM
  • Experience with verification methodologies and tools
  • Working knowledge with scripting languages: Python, Perl, TCL
  • Experience with serial protocols such as PCIe or USB

Benefits For Design Verification Engineer

Medical Insurance
Dental Insurance
Vision Insurance
401k
Education Budget
Equity
Relocation Benefits
  • Comprehensive medical and dental coverage
  • Retirement benefits
  • Discounted products and free services
  • Education reimbursement
  • Stock options and employee stock purchase plan
  • Discretionary bonuses
  • Relocation assistance

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