Formal Verification Engineer

Apple is a technology company that designs and develops consumer electronics, software, and services.
$143,100 - $264,200
Security
Senior Software Engineer
In-Person
5,000+ Employees
3+ years of experience
AI · Hardware

Description For Formal Verification Engineer

Apple is seeking a talented Formal Verification Engineer to join their Silicon Technologies group, focusing on next-generation processor and system-on-chip (SoC) development. This role combines hardware expertise with formal verification methodologies to ensure the security and reliability of Apple's cutting-edge silicon designs.

As a formal verification engineer, you'll work with world-class Security Enclave design engineers to develop and implement comprehensive verification strategies for various IP blocks including CPU, Cellular and Connectivity, Audio and Image Processing, Neural Networks, Memory Controllers, and Security components. Your responsibilities will span from developing formal micro-architecture specifications to proving design properties and identifying potential security vulnerabilities.

The role requires a unique blend of technical skills in VLSI design, formal methods, and security principles. You'll be crafting novel solutions for modeling security attacks and proving the robustness of complex design micro-architectures. This position offers the opportunity to work with industry-leading tools and methodologies while contributing to products used by millions of customers worldwide.

Key aspects of the role include:

  • Developing comprehensive formal verification test plans incorporating security requirements
  • Working closely with design teams to improve micro-architecture through bug discovery and verification
  • Creating reusable and optimized formal models and verification code
  • Implementing correct-by-construction design methodologies
  • Collaborating with various teams across Apple's silicon development ecosystem

The position offers competitive compensation ranging from $143,100 to $264,200, comprehensive benefits including medical/dental coverage, stock options, and educational reimbursement opportunities. Join Apple's Silicon Technologies group to be at the forefront of processor design verification and make a significant impact on next-generation Apple products.

Last updated 4 days ago

Responsibilities For Formal Verification Engineer

  • Develop formal micro-architecture specifications for Security Enclave
  • Create and implement comprehensive formal verification test plans
  • Prove design properties and identify bugs
  • Model security attacks and prove design robustness
  • Develop reusable formal models and verification code
  • Architect correct-by-construction design methodologies
  • Collaborate with design teams to improve micro-architecture

Requirements For Formal Verification Engineer

  • Bachelor's degree and minimum 3 years of relevant industry experience in silicon validation software engineering
  • Knowledge of VLSI and digital logic design
  • Understanding of formal verification techniques
  • Experience with temporal logic assertion-based languages (SVA or PSL)
  • Proficiency in scripting languages
  • Knowledge of hardware specifications
  • Experience with EDA formal tools

Benefits For Formal Verification Engineer

Medical Insurance
Dental Insurance
Vision Insurance
401k
Education Budget
Equity
  • Medical Insurance
  • Dental Insurance
  • Vision Insurance
  • 401k
  • Education Budget
  • Equity

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