Formal Verification Engineer

A leading technology company that designs and develops consumer electronics, software, and services.
Hardware
Entry-Level Software Engineer
In-Person
5,000+ Employees
AI

Description For Formal Verification Engineer

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices.

As a formal verification engineer, you will be working on complete formal verification for single or multiple design blocks and IPs including CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, and Power management subsystems. You'll work with world-class Security Enclave design engineers to develop formal micro-architecture specifications and comprehensive verification test plans. Your role involves proving design properties, finding bugs, and collaborating closely with design teams to improve micro-architecture.

You'll be crafting innovative solutions for modeling security attacks and proving robustness of complex design micro-architectures. The position requires developing reusable and optimized formal models and verification code base, while also architecting correct-by-construction design methodologies for improved verification efficiency. This is an opportunity to learn from the best Formal Verification team in the world and gain experience being at the center of SoC design verification efforts.

Join us in having a critical impact on delivering high-quality functional products to millions of customers quickly. If you're passionate about changing the world through technology and have a detail-oriented approach with a desire to overcome challenges, this role offers the perfect opportunity to contribute to Apple's next generation of innovative products.

Last updated 8 hours ago

Responsibilities For Formal Verification Engineer

  • Working with Apple Silicon's Security Enclave design engineers to develop formal micro-architecture specification
  • Developing comprehensive formal verification test plans including security requirement verification
  • Proving properties of the design, finding design bugs, and working with design teams
  • Crafting solutions for modelling security attacks and proving robustness of design micro-architectures
  • Developing reusable and optimized formal models and verification code base
  • Architecting correct-by-construction design methodologies

Requirements For Formal Verification Engineer

  • Bachelor's degree in electrical engineering, computer engineering, or related field
  • 0 years of experience

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