Graphics Cache Hierarchy Design Verification Engineer

Apple's Silicon Technologies group is seeking a Graphics Cache Hierarchy Design Verification Engineer to join their team working on next-generation, high-performance processor and system-on-chip (SoC) development. This role focuses on pre-silicon RTL verification of graphics memory subsystem units, including Caches, Memory Management Unit, Interconnects, and Link interface units. The position requires deep understanding of micro-architectural details and how components work within the broader GPU design.

As part of the GPU Caches and Memory-Hierarchy Verification team, you'll be responsible for architectural and micro-architectural verification of critical memory subsystems. The role combines software engineering expertise with graphics hardware architecture knowledge. Key responsibilities include developing test plans, creating complex verification software, and collaborating with design teams for debugging.

The ideal candidate should have a strong computer architecture background and solid verification methodology foundation. Experience with hardware description languages, object-oriented programming, and computer architecture is essential. The position offers growth opportunities in both software engineering and graphics hardware architecture domains.

Benefits include comprehensive medical/dental coverage, retirement benefits, stock options, education reimbursement, and potential bonuses. The role is based in Santa Clara, California, and offers competitive compensation ranging from $121,900 to $183,600, plus additional benefits and equity opportunities.

This is an excellent opportunity for someone passionate about hardware verification and GPU architecture to work on cutting-edge technology that powers millions of Apple devices worldwide.