Timing Design Engineer

At Apple, we work every single day to craft products that enrich people's lives. As a Timing Design Engineer, you'll join our Hardware team working on challenges that no one has solved yet. This role puts you at the center of PHY design efforts, where you'll collaborate with architecture, CAD, and logic design teams to deliver outstanding PHY designs. You'll be responsible for all aspects of SoC design timing, including timing sign-off, STA and sign-off flow development, and ownership of IP and block level timing constraints. Working closely with RTL designers, CAD teams, and Physical design teams, you'll ensure successful timing closure and sign-off. The role requires expertise in ASIC timing constraints, STA tools like Primetime, and scripting languages such as Tcl and Perl. You'll innovate timing constraints and flows while working with some of the most advanced hardware technologies in the industry. This position offers competitive compensation, comprehensive benefits, and the opportunity to shape products used by millions of people worldwide. Join Apple's hardware team and be part of creating the next generation of groundbreaking technologies.