High Speed RTL Design Engineer
Description For High Speed RTL Design Engineer
Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking a High Speed RTL Design Engineer for their San Jose office. This senior-level position requires extensive expertise in digital design and implementation, particularly focusing on high-speed RTL design and data converter systems.
The role combines deep technical knowledge with leadership responsibilities, requiring 10+ years of experience in RTL design and an advanced degree in Electrical or Computer Engineering. The position offers a competitive salary range of $141,000 - $225,000, along with comprehensive benefits including medical coverage, 401(k) matching, and equity opportunities.
As an RTL Design Engineer, you'll be working on cutting-edge technology implementations using TSMC's advanced nodes (7nm-2nm), developing sophisticated digital processing systems, and implementing complex digital filters and delta-sigma architectures. The role requires expertise in various front-end tools and methodologies, including Verilog-HDL/System Verilog coding, synthesis, and timing analysis.
The ideal candidate will possess strong analytical and problem-solving skills, with the ability to work effectively across internal and customer teams. You'll be involved in design management, requiring detailed knowledge of development methodologies and design flows. The position offers the opportunity to work on innovative solutions in a collaborative environment while contributing to Broadcom's continued leadership in semiconductor technology.
This role is perfect for someone who combines technical expertise with strong communication skills and enjoys working in a multifunctional capacity. You'll be part of a team pushing the boundaries of high-speed digital design while having the opportunity to influence project outcomes through technical innovation and leadership.
Responsibilities For High Speed RTL Design Engineer
- Digital filter design including CIC, FIR and IIR architectures
- Digital delta sigma loop design
- Implementation of digital processing stages
- Work with standard peripherals such as AMBA BUS/I2C/SPI/UART
- Signal Integrity and Power Integrity modeling for High Speed designs
- Collaborate with internal and end customer teams
Requirements For High Speed RTL Design Engineer
- MS or PhD in Electrical Engineering or Computer Engineering
- 10+ years of experience in RTL design
- Proficient with Verilog-HDL/System Verilog coding
- Proficient with front end tools (NCVerilog, NCSIM/VCS, Simvision, Lint, Spyglass)
- Experience with digital design for data converters
- Experience in synthesis, CDC, static timing analysis
- Strong analytical thinking and problem-solving skills
- Experience in design management
- Knowledge of TSMC 7nm-2nm technology
Benefits For High Speed RTL Design Engineer
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Annual discretionary bonus
- Equity awards
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