Senior Memory Circuit Design Engineer
Description For Senior Memory Circuit Design Engineer
Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking a Senior Memory Circuit Design Engineer to join their Central Engineering Group. This role is part of an elite memory team working on cutting-edge process technology development.
The position offers a competitive salary range of $91,000 - $146,000, along with comprehensive benefits including medical, dental, vision insurance, 401(k) matching, and equity opportunities through ESPP. The role requires 5+ years of experience and a BS in Electrical Engineering.
As a Senior Memory Circuit Design Engineer, you'll be responsible for developing memory compilers and custom macros, analyzing different memory architectures, and working with circuit designs at the transistor level. Key responsibilities include performing simulations, layout extraction, and verification, as well as developing automation scripts and documenting design specifications.
The ideal candidate should possess strong technical skills in memory compiler development, circuit behavior, and device physics. Understanding of signal integrity, reliability analysis, and DFT schemes is crucial. The role requires both technical expertise and strong soft skills, including communication and leadership abilities.
This position offers an opportunity to work on bleeding-edge technology with an industry leader, while being part of a team that drives innovation in memory design. The role provides both technical challenges and growth opportunities, making it ideal for experienced engineers looking to advance their careers in semiconductor design.
Responsibilities For Senior Memory Circuit Design Engineer
- Analyze different memory architectures and highlight the tradeoffs
- Design and build memory or circuit blocks at the gate or transistor level
- Simulate and analyze circuit design using transistor level simulators
- Extract layout and perform post-layout simulations and verification
- Floorplan physical implementation and leafcell layout integration
- Integrate characterization flow to extract timing and power information
- Develop scripts to automate characterization flow, simulations, and verification
- Specify and verify various behavioral and physical memory models
- Document design specifications, behavioral description, and timing diagrams
- Specify silicon test plan and correlate silicon to simulation data
- Help debug silicon issues
Requirements For Senior Memory Circuit Design Engineer
- BS in Electrical Engineering
- Knowledge in development of memory compilers or custom digital circuits
- Good understanding of transistor level circuit behavior and device physics
- Good understanding of signal integrity, EM/IR, and reliability analysis
- Understanding of memory behavioral and physical models
- Understanding of DFT schemes and chip level integration
- Proficient in running simulators, writing automation scripts
- Good communication, interpersonal, and leadership skills
- Motivated, self-driven and good at multi-tasking
Benefits For Senior Memory Circuit Design Engineer
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Annual discretionary bonus
- Equity compensation
