STA Engineer
Description For STA Engineer
Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking a Senior STA Engineer to join their team in San Jose. This role offers an exciting opportunity to work on cutting-edge ASIC products for next-generation optical and electrical data center connectivity solutions. The position requires extensive experience in ASIC Design Verification, with responsibilities spanning from timing constraint development to clock tree optimization.
The ideal candidate will bring 8+ years of experience (with BS) or 6+ years (with MS) in ASIC Design Verification, demonstrating expertise in static timing analysis, constraint development, and synthesis tools. You'll be working with advanced technology nodes and complex silicon designs, utilizing industry-standard tools like PrimeTime and Tempus.
This role offers a competitive compensation package ranging from $119,000 to $190,000 annually, plus discretionary bonuses and equity awards. Broadcom provides comprehensive benefits including medical, dental, and vision insurance, 401(k) matching, ESPP, and various leave benefits.
Join a dynamic team where your expertise in timing analysis, constraint development, and ASIC design flows will directly impact the development of next-generation connectivity solutions. This is an excellent opportunity for a seasoned professional looking to work with cutting-edge technology while contributing to innovative solutions in data center connectivity.
Responsibilities For STA Engineer
- Work on various ASIC products for next generation optical and electrical data center connectivity products
- Develop and validate timing constraints for intricate SoC designs
- Perform static timing analysis using industry-standard tools
- Define and implement timing signoff methodologies
- Conduct pre-route timing checks and QoR analysis
- Automate timing analysis processes
- Provide guidance on clock tree synthesis and optimization
- Ensure compliance with timing signoff checklists and criteria
Requirements For STA Engineer
- BSc in Electrical Engineering or Computer Engineering with 8+ years of experience or MS with 6+ years of experience
- Experience with high-complexity silicon in advanced technology nodes
- Familiarity with timing constraint development for hierarchical designs
- Knowledge of clock tree planning and implementation for SoCs
- Experience with timing ECO creation and final timing signoff
- Proficiency in using STA tools and scripting languages (Tcl, Perl)
- Proficiency in using synthesis tools (Genus)
- Strong understanding of ASIC design flows
- Excellent problem-solving skills and attention to detail
- Effective communication and teamwork abilities
Benefits For STA Engineer
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Annual discretionary bonus
- Equity awards
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