ASIC Design Verification Engineer, Devices and Services

Google's Devices and Services team is seeking an ASIC Design Verification Engineer to join their hardware innovation efforts. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products, combining the best of Google AI, Software, and Hardware to create groundbreaking experiences.

The position involves working with next-generation configurable Infrastructure IPs, interconnects, and memory subsystems. You'll be responsible for creating and enhancing verification environments using SystemVerilog and UVM, while also developing cross-language tools and methodologies. The role requires expertise in digital logic verification at the RTL level and experience with standard IP components and interconnects.

This is an excellent opportunity for someone with strong verification skills who wants to impact millions of users worldwide through Google's hardware products. The ideal candidate will have experience with cache hierarchies, coherency, memory consistency models, and various interconnect protocols. You'll work closely with design engineers to ensure functional correctness and comprehensive coverage of complex systems.

The role offers the chance to work on cutting-edge hardware technology while being part of Google's mission to organize the world's information and make it universally accessible. You'll be contributing to the next generation of hardware experiences, focusing on unparalleled performance, efficiency, and integration.

Working at Google means joining a team that pushes boundaries and develops innovative solutions. You'll be part of a diverse and inclusive workplace that values different perspectives and is committed to creating radically helpful experiences for users worldwide.