CPU Design Verification Engineer, PhD University Graduate, 2025 Start
Description For CPU Design Verification Engineer, PhD University Graduate, 2025 Start
Join Google's Technical Infrastructure team as a CPU Design Verification Engineer, where you'll be part of a diverse R&D team developing custom silicon solutions for Google's direct-to-consumer products. This role combines hardware verification expertise with software engineering principles, focusing on verifying complex digital designs for server chip architecture.
As a PhD University Graduate position starting in 2025, you'll work on verification planning, test execution, and coverage closure for critical hardware components. You'll collaborate with design engineers to ensure the functionality and reliability of Google's custom silicon solutions, using advanced verification methodologies and tools including SystemVerilog and UVM.
The position offers the opportunity to work on cutting-edge technology that powers Google's infrastructure, directly impacting products used by millions worldwide. You'll be responsible for the full verification lifecycle, from planning to implementation, ensuring the quality and reliability of complex digital designs.
This role is perfect for someone with a strong background in hardware verification who wants to work on innovative projects at scale. You'll be part of the team that builds and maintains Google's data centers and platforms, ensuring optimal performance and efficiency. The position requires a blend of technical expertise in hardware verification and software development, with opportunities to work on challenging problems in a collaborative environment.
Responsibilities For CPU Design Verification Engineer, PhD University Graduate, 2025 Start
- Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers
- Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs
- Identify and write all types of coverage measures for stimulus and corner-cases
- Debug tests with design engineers to deliver functionally correct design blocks
- Apply close coverage measures to identify verification holes and show progress towards tape-out
Requirements For CPU Design Verification Engineer, PhD University Graduate, 2025 Start
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- Experience creating and using verification components and environments in standard verification methodology
- Experience verifying digital logic at Register Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs
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