Design Verification Engineer

Google develops custom silicon solutions that power direct-to-consumer products, combining AI, Software, and Hardware to create helpful experiences for users.
$113,000 - $161,000
Embedded
Entry-Level Software Engineer
In-Person
5,000+ Employees
Hardware

Description For Design Verification Engineer

Google is seeking a Design Verification Engineer to join their Devices & Services team, focusing on developing custom silicon solutions for Google's direct-to-consumer products. This role combines hardware verification expertise with Google's mission to organize world's information and make it universally accessible.

The position involves working with cutting-edge hardware technologies, verifying digital design blocks, and ensuring the quality of silicon solutions that power Google's products. You'll be responsible for creating and maintaining verification environments using SystemVerilog and UVM, working closely with design engineers to identify and resolve issues.

The role offers an opportunity to work on products that impact millions of users worldwide, with competitive compensation including a base salary range of $113,000-$161,000, plus bonus, equity, and comprehensive benefits. The position is based in Mountain View, CA, and requires a bachelor's degree in a relevant field with experience in verification methodologies.

As part of Google's Devices & Services team, you'll contribute to the innovation behind products that combine AI, Software, and Hardware to create radically helpful experiences. The team focuses on advancing form factors, improving interaction methods, and making computing faster and more seamless for users.

This is an excellent opportunity for someone passionate about hardware verification who wants to work on impactful products at scale, with access to Google's extensive resources and innovative technology stack. The role offers professional growth opportunities and the chance to work with industry-leading experts in silicon design and verification.

Last updated 10 hours ago

Responsibilities For Design Verification Engineer

  • Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers
  • Create and enhance constrained-random verification environments using SystemVerilog and UVM
  • Identify and write all types of coverage measures for stimulus and corner-cases
  • Debug tests with design engineers to deliver design blocks
  • Resolve coverage measures to identify verification holes and show progress towards tape-out

Requirements For Design Verification Engineer

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • Experience with verification methodologies and languages such as Universal Vefification Methodology (UVM) or SystemVerilog

Benefits For Design Verification Engineer

Medical Insurance
Equity
401k
  • Medical Insurance
  • Equity
  • 401k

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