Lead CPU RTL Engineer, Silicon
Description For Lead CPU RTL Engineer, Silicon
Google is seeking a Lead CPU RTL Engineer to join their Silicon team, working on cutting-edge processor development that powers Google's direct-to-consumer products. This role combines advanced hardware engineering with Google's innovative technology stack to create next-generation computing solutions.
The position requires deep expertise in digital logic design and RTL development, with a focus on CPU frontend designs and microarchitecture. You'll be working on performance optimization, power efficiency, and architectural improvements for next-generation CPUs. The role offers an opportunity to shape the future of Google's hardware experiences, working with state-of-the-art processor technologies.
As a Lead CPU RTL Engineer, you'll collaborate with architects and performance teams to propose and implement microarchitecture features, conduct trade-off studies, and deliver designs that meet strict power, performance, and area (PPA) goals. The position requires both technical expertise and leadership skills, as you'll be guiding technical decisions and providing direction on processor functional blocks.
The role offers competitive compensation, including a base salary range of $183,000-$271,000, plus bonus, equity, and comprehensive benefits. You'll be working at one of several possible locations: Poughkeepsie, NY; Austin, TX; Mountain View, CA; or Portland, OR. This is an excellent opportunity for experienced hardware engineers looking to make an impact on Google's future hardware products while working with cutting-edge technology and a world-class team.
The ideal candidate will have at least 8 years of experience with digital logic design principles and RTL design concepts, along with expertise in languages like Verilog or SystemVerilog. Advanced education in Computer Engineering or related fields is preferred, particularly with a focus on computer architecture. You'll be part of Google's mission to organize the world's information and make it universally accessible, working on hardware solutions that combine AI, software, and custom silicon development.
Responsibilities For Lead CPU RTL Engineer, Silicon
- Contribute to CPU frontend designs, emphasizing on microarchitecture and RTL design for the next generation CPU
- Propose performance enhancing microarchitecture features with efficiency in mind
- Work with architects and performance teams for trade-off studies
- Deliver designs meeting Power, performance and area (PPA) goals with production quality
- Become familiar with state-of-the-art techniques for at least one processor functional block
Requirements For Lead CPU RTL Engineer, Silicon
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
- Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques
Benefits For Lead CPU RTL Engineer, Silicon
- Medical Insurance
- Equity
- 401k
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