Google is seeking a Lead CPU RTL Engineer to join their Silicon team, working on cutting-edge processor development that powers Google's direct-to-consumer products. This role combines advanced hardware engineering with Google's innovative approach to technology, focusing on creating solutions that impact millions of users worldwide.
The position requires deep expertise in digital logic design and RTL concepts, with a focus on CPU frontend designs and microarchitecture. You'll be responsible for developing next-generation CPU architectures, optimizing for performance, power efficiency, and area constraints. The role involves close collaboration with architects and performance teams to evaluate and implement architectural improvements.
As a Lead CPU RTL Engineer, you'll be working at Google's hardware division, which combines AI, Software, and Hardware to create groundbreaking user experiences. The role offers competitive compensation ($183,000-$271,000 + bonus + equity) and the opportunity to work in several major tech hubs including Poughkeepsie, Austin, Mountain View, or Portland.
The ideal candidate will have at least 8 years of experience with digital logic design principles and RTL design concepts, with proficiency in Verilog or SystemVerilog. You should be comfortable with logic synthesis techniques and low-power design methodologies. A background in computer architecture and advanced degree holders are particularly valued.
This is an excellent opportunity for experienced hardware engineers looking to make a significant impact on Google's hardware ecosystem, working with cutting-edge technology and contributing to products used by millions of people globally. The role offers the chance to work with industry-leading experts and shape the future of Google's custom silicon solutions.