RTL Design Engineer, Camera and Machine Learning, Silicon
Description For RTL Design Engineer, Camera and Machine Learning, Silicon
Google is seeking an RTL Design Engineer to join their Silicon team, focusing on camera and machine learning designs. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products, contributing to innovations that impact millions of users worldwide.
The position involves Register-Transfer Level (RTL) design development, specifically for camera and machine learning implementations. Key responsibilities include RTL coding, lint cleanup, SoC IP release flows, and architecture optimization. The engineer will work on power, performance, and area (PPA) optimizations, while collaborating on test planning and ensuring high-quality Core IP deliveries.
This is an excellent opportunity for someone with strong digital logic design experience and expertise in Verilog/SystemVerilog. The role combines hardware engineering with cutting-edge machine learning applications, making it ideal for candidates interested in working at the intersection of AI and silicon design.
The position offers competitive compensation ($132,000-$189,000 + bonus + equity + benefits) and the chance to work with Google's industry-leading teams. Located in either Mountain View or San Diego, CA, the role provides an opportunity to work on projects that directly impact Google's hardware experiences and future innovations.
The ideal candidate will have at least 3 years of relevant experience and a strong background in digital design principles. Additional expertise in Camera ISP image processing blocks, Machine Learning IPs, or multimedia IPs would be particularly valuable. The role requires both technical depth in hardware design and the ability to collaborate effectively with cross-functional teams.
Working at Google, you'll be part of a diverse team that pushes boundaries and develops solutions that power the future of Google's direct-to-consumer products. This is a chance to shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration in Google's products.
Responsibilities For RTL Design Engineer, Camera and Machine Learning, Silicon
- Perform Verilog/SystemVerilog RTL coding, function/performance simulation debug, and Lint/CDC/FV/UPF checks
- Perform RTL verification using industry standard methodologies. Participate in test planning and coverage analysis
- Develop RTL implementations that meet engaged power, performance and area goals
- Participate in synthesis, timing/power closure and field programmable gate array (FPGA)/silicon bring-up
- Create tools/scripts to automate tasks and track progress
Requirements For RTL Design Engineer, Camera and Machine Learning, Silicon
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
- Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques
- Experience with a scripting language such as Perl or Python
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