RTL Design Engineer, Google Cloud

Google Cloud is seeking an experienced RTL Design Engineer to join their Technical Infrastructure team. This role focuses on developing custom silicon solutions that power Google's direct-to-consumer products. As an RTL Design Engineer, you'll be responsible for creating System on a Chip (SoC) designs from conception to production, working with ASIC technology.

You'll be part of a diverse team that pushes boundaries in hardware innovation, working on projects that impact millions of users worldwide. The role involves collaborating with various teams including architecture, software, verification, power, timing, and synthesis to deliver high-quality SoC/RTL solutions.

Your responsibilities will include leading complex ASIC subsystems, defining high-performance hardware/software interfaces, and creating efficient micro-architecture designs. You'll need to balance performance, power, and area considerations while developing innovative solutions for technical challenges.

The position requires strong expertise in RTL development using Verilog, experience with speed interfaces like PCIe and InfiniBand, and deep knowledge of micro architecture, design verification, and timing closure. You'll be working in either Tel Aviv or Haifa, Israel, contributing to Google's next generation of hardware experiences.

This is an excellent opportunity for someone passionate about hardware design who wants to make a significant impact on Google's infrastructure. You'll be working with cutting-edge technology, solving complex technical challenges, and contributing to the foundation that powers Google's vast product portfolio. The role offers the chance to work with industry-leading experts and shape the future of Google's hardware architecture.