Silicon IP RTL Design Engineer, Google Cloud

Google is seeking a Silicon IP RTL Design Engineer to join their Google Cloud team, focusing on developing Application-specific integrated circuits (ASICs) for machine learning acceleration in data centers. This role is part of the ML, Systems, & Cloud AI (MSCA) organization, which is responsible for Google's hardware and software infrastructure powering all Google services and Google Cloud.

The position involves working on cutting-edge hardware development for one of the world's largest computing infrastructures. You'll be collaborating with cross-functional teams including architecture, verification, power and performance, and physical design to deliver next-generation data center accelerators. The role requires expertise in ASIC development, microarchitecture design, and hardware description languages.

As a Silicon IP RTL Design Engineer, you'll be responsible for the complete lifecycle of IP development, from specification to implementation. You'll work on solving complex technical problems related to microarchitecture, contribute to design methodology improvements, and drive power and performance optimizations. The position offers the opportunity to work on technology that directly impacts Google's machine learning capabilities and cloud infrastructure.

The ideal candidate should have strong experience in ASIC development, verification, and testing, along with knowledge of modern hardware design techniques. This role combines technical expertise with collaborative teamwork, making it perfect for someone passionate about hardware design and interested in working on large-scale, impactful projects at the intersection of cloud computing and machine learning acceleration.