Silicon Networking Microarchitecture and RTL Lead, Google Cloud

Join Google Cloud as a Silicon Networking Microarchitecture and RTL Lead, where you'll be at the forefront of AI/ML hardware acceleration technology. This role offers an exciting opportunity to shape the future of TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be working on cutting-edge ASICs used to accelerate and improve traffic efficiency in data centers, collaborating with cross-functional teams in architecture, verification, power and performance, and physical design.

As part of the ML, Systems, & Cloud AI (MSCA) organization, you'll contribute to the infrastructure that powers all Google services and Google Cloud. The role requires deep expertise in ASIC development, microarchitecture design, and networking domains. You'll be responsible for developing custom silicon solutions that drive the future of Google's TPU technology, working on complex digital designs with a focus on TPU architecture and its integration within AI/ML-driven systems.

The position offers the chance to work on technology that impacts billions of users worldwide through Google's services and Cloud platform. You'll be solving technical challenges with innovative microarchitecture and practical logic solutions, while considering complexity, performance, power, and area optimization. This is an opportunity to be part of Google's mission in shaping the future of hyperscale computing and contributing to leading AI platforms like Vertex AI.

The role combines technical leadership with hands-on development, requiring both depth in hardware design and breadth in understanding system-level implications. You'll be working in an environment that prioritizes security, efficiency, and reliability, while pushing the boundaries of what's possible in hardware acceleration for AI/ML workloads.