Join Google Cloud as a Silicon Networking Microarchitecture and RTL Lead, where you'll be at the forefront of shaping the future of AI/ML hardware acceleration. This role offers an exciting opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. As part of the ML, Systems, & Cloud AI (MSCA) organization, you'll work on developing custom silicon solutions that power Google's TPU technology and contribute to innovations that impact billions of users worldwide.
You'll be responsible for developing cutting-edge ASICs used to accelerate and improve traffic efficiency in data centers, collaborating with cross-functional teams in architecture, verification, power and performance, and physical design. The role requires solving complex technical problems with innovative micro-architecture and practical logic solutions, while carefully evaluating design options considering complexity, performance, power, and area constraints.
The position offers the chance to work with Google's global infrastructure, including the development of TPUs and running a global network, while contributing to the future of hyperscale computing. You'll be part of Google Cloud's initiatives in AI platforms, including Vertex AI, which brings Gemini models to enterprise customers. This role combines technical leadership with hands-on development, requiring expertise in ASIC development, system architecture, and networking domains.
Working at Google, you'll be part of a company committed to innovation and technological advancement, with access to resources and tools that enable the development of next-generation hardware solutions. The role offers the opportunity to work on projects that directly impact Google's core services and cloud infrastructure, while collaborating with some of the industry's brightest minds in silicon design and AI acceleration.