SoC Interface Architect, Silicon

Global technology leader developing innovative hardware and software solutions.
Embedded
Mid-Level Software Engineer
In-Person
5,000+ Employees
3+ years of experience
Consumer · Hardware

Description For SoC Interface Architect, Silicon

Google's Devices & Services team is seeking a SoC Interface Architect to join their innovative hardware development efforts. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products. As part of the team, you'll be working on cutting-edge hardware experiences that combine Google's AI, Software, and Hardware expertise to create radically helpful experiences for users worldwide.

The position involves architecting and designing low-speed interfaces and GPIO systems for SoC implementations. You'll be responsible for defining requirements, creating architecture specifications, and ensuring optimal performance through careful analysis of power, area, and cost trade-offs. The role requires deep expertise in various protocols including I2C, UART, SPI, and familiarity with advanced interfaces like I2S, JTAG, and SoundWire.

Working at Google's Bengaluru location, you'll be part of a team that pushes boundaries in hardware development, contributing to products used by millions of people. The role offers the opportunity to shape the next generation of hardware experiences, focusing on unparalleled performance, efficiency, and integration. You'll collaborate with system teams and lead the development lifecycle of low-speed interfaces, making a direct impact on Google's hardware ecosystem.

This position combines technical leadership with hands-on architecture work, requiring both depth in electrical engineering and breadth in system architecture. The ideal candidate will bring experience in SoC architecture, strong understanding of interface protocols, and the ability to make complex technical decisions that balance various engineering constraints.

Last updated 23 days ago

Responsibilities For SoC Interface Architect, Silicon

  • Define the requirements and author architecture specifications and the programming guides
  • Analyze performance, power, area, and cost trade-offs
  • Perform 3PIP selection of low speed interface IPs and General Purpose input/output (GPIO) IPs
  • Define and maintain SoC input/output (IO) map collaborating with the system team
  • Lead and drive and support throughout the life cycle of low speed interfaces development

Requirements For SoC Interface Architect, Silicon

  • Bachelor's degree in Electrical Engineering or equivalent practical experience
  • 3 years of experience in architecture, microarchitecture, design, or physical design of low speed interfaces or GPIO
  • Experience in protocols such as Improved Inter-Integrated Circuit, I2C, Universal Asynchronous Receiver-Transmitter, SPI
  • Master's degree in Electrical Engineering or related field (preferred)
  • Experience in SoC architecture or systems architecture (preferred)
  • Experience in IO timing closure and with GPIO circuit design (preferred)
  • Experience with protocols: I2S, JTAG, TDM, PDM, SoundWire, SPMI (preferred)

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