Staff Coherent Memory System Architect, Silicon
Description For Staff Coherent Memory System Architect, Silicon
Google is seeking a Staff Coherent Memory System Architect to join their hardware team, focusing on developing custom silicon solutions for consumer products. This role involves shaping the future of coherent memory systems for consumer SoCs, requiring expertise in microarchitecture and ASIC design. The position demands 7+ years of experience in microarchitecture and ASIC block design, with a strong background in performance analysis and RTL implementation.
The ideal candidate will work on creating advanced, power-efficient, and performance-optimized mobile coherent systems, directly impacting next-generation devices. They will collaborate with hardware designers and validation teams, contributing to innovative memory system technology development and patent filing.
This role offers the opportunity to work with Google's cutting-edge technology, combining AI, software, and hardware to create impactful consumer products. The position is based in New Taipei, Taiwan, where you'll join a diverse team pushing boundaries in custom silicon solutions.
Key responsibilities include exploring microarchitecture design choices, authoring specifications, analyzing performance trade-offs, and working closely with various hardware teams. The role requires a bachelor's degree in Electrical Engineering or related field, with preferred qualifications including an advanced degree and expertise in coherent interconnects and memory systems.
Google offers a collaborative environment focused on innovation and making technology more accessible and useful for millions of users worldwide. They are committed to diversity, equality, and creating a culture of belonging, making this an excellent opportunity for professionals looking to make a significant impact in hardware architecture and design.
Responsibilities For Staff Coherent Memory System Architect, Silicon
- Explore and evaluate different microarchitecture and design choices for power and performance efficient coherent memory systems
- Author hardware microarchitecture specification for next-generation coherent memory systems
- Analyze performance and power trade-offs
- Work with Hardware design, verification, emulation and validation teams to build and test the hardware architecture
Requirements For Staff Coherent Memory System Architect, Silicon
- Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience
- 7 years of experience in microarchitecture and design of ASIC blocks
- Experience in micro-architecture performance analysis, tools, and simulators
- Experience in designing or implementing RTL for CPUs, GPUs, caches, MMUs or coherent fabrics
- Knowledge of HDL languages such as System Verilog, Verilog
- Knowledge in coherent interconnects, Caches, memory systems
