Layout Design Engineer

We are seeking a Layout Design Engineer to join our growing team of diverse individuals responsible for handling challenging high-speed digital and analog circuit designs. NVIDIA, a leader in GPU technology, has revolutionized parallel computing and is at the forefront of AI research.

Responsibilities:

• Execute IC layout of cutting-edge, high-performance, high-speed CMOS integrated circuits in foundry CMOS process nodes (3nm, 5nm, 7nm, and lower)
• Deliver layouts for Circuit Solutions Group specializing in digital and analog IPs
• Implement best layout practices/methodology for composing analog and digital layouts
• Follow company procedures and practices for IC layout activities

Requirements:

• 2+ years of experience in high-performance analog layout in advanced CMOS processes
• BE/M-Tech in Electrical & Electronics or equivalent experience
• Thorough knowledge of industry-standard EDA tools for Cadence
• Experience with layout of high-performance analog blocks (current mirrors, sense amps, bandgaps, etc.)
• Knowledge of analog design and layout guidelines, high-speed IO
• Experience with floor planning, block-level routing, and macro-level assembly
• Expertise in high-performance analog layout techniques
• Demonstrated experience with analog layout for silicon chips in mass production
• Background with sub-micron design in foundry CMOS nodes 7nm FinFET and below (preferred)
• Experience working in a distributed design team is a plus
• Self-starter with the ability to define and adhere to a schedule

NVIDIA is an equal opportunity employer valuing diversity and does not discriminate based on race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

Join NVIDIA to be part of a learning machine that constantly evolves, adapting to new opportunities that are challenging, unique, and impactful to the world.