Low Power ASIC Engineer - New College Grad 2025

NVIDIA is the world leader in accelerated computing, pioneering AI and digital twins technology to transform industries.
$96,000 - $184,000
Embedded
Entry-Level Software Engineer
In-Person
5,000+ Employees
AI · Automotive

Description For Low Power ASIC Engineer - New College Grad 2025

NVIDIA, a global leader in accelerated computing and AI technology, is seeking a New College Graduate Low Power ASIC Engineer to join their innovative team. This role offers an exciting opportunity to work on cutting-edge GPU and SOC architectures, focusing on energy-efficient solutions for AI, Automotive, GeForce, and Mobile products.

As a Low Power ASIC Engineer, you'll be at the forefront of developing state-of-the-art GPUs, working closely with Architecture, Design, and Software teams. Your responsibilities will include architecting testbenches, developing infrastructure, and creating testplans for various power management solutions. This position offers the unique opportunity to influence both internal methodologies and EDA vendor tools, directly impacting the efficiency of NVIDIA's simulation and debugging processes.

The ideal candidate should have a strong educational background in Electrical or Computer Engineering, with knowledge of low power design techniques and processor architecture. Proficiency in Verilog, SystemVerilog, and UVM is essential, along with experience in specific tools like Incisive Low-Power or Synopsys VCS NLP.

NVIDIA offers a competitive compensation package, including a base salary range of $96,000 - $184,000, equity, and comprehensive benefits. The company is known for its innovative culture and commitment to pushing technological boundaries, making it an ideal place for new graduates to launch their careers in hardware engineering.

This role is based in Santa Clara, CA, at NVIDIA's headquarters, where you'll be surrounded by some of the technology world's most forward-thinking professionals. The company maintains a diverse and inclusive work environment, encouraging creativity and autonomy while working on projects that have real-world impact across various industries.

Last updated 18 hours ago

Responsibilities For Low Power ASIC Engineer - New College Grad 2025

  • Work closely with Low Power Architecture, Design, and Software teams
  • Architect/develop testbench, infrastructure, and testplans for power management solutions
  • Improve power-aware DV methodologies
  • Influence EDA vendors to improve simulation and debug efficiencies

Requirements For Low Power ASIC Engineer - New College Grad 2025

Python
  • BS, MS or PhD in Electrical or Computer Engineering or equivalent experience
  • Understanding of low power design techniques (multi VT, Clock gating, Power gating, Block Activity Power, DVFS)
  • Understanding of processor architecture
  • Experience with Incisive Low-Power or Synopsys VCS NLP
  • Strong debug skills and experience with Verdi
  • Fluency in Verilog, SystemVerilog, and understanding of UVM

Benefits For Low Power ASIC Engineer - New College Grad 2025

Equity
  • Base salary
  • Equity
  • Additional benefits (details not specified)

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