ASIC Low power design engineer (GPU) -Staff
Description For ASIC Low power design engineer (GPU) -Staff
Qualcomm is seeking a Staff-level ASIC Low Power Design Engineer specializing in GPU architecture to join their team in Bangalore. This role combines expertise in low-power design with ASIC architecture, requiring a deep understanding of power optimization techniques and hardware design principles.
The position demands 6-8 years of front-end design experience, with specific expertise in Power Intent (UPF), power estimation, and optimization tools like PTPX/Power Artist. The ideal candidate will have strong skills in hardware design using Verilog/System Verilog and proficiency with various low-power analysis tools.
At Qualcomm, you'll be working alongside leading engineering and technology experts in the industry, contributing to world-changing innovations in mobile and wireless technology. The company offers comprehensive professional development opportunities, including continuous learning programs, tuition reimbursement, and mentorship opportunities.
The role offers significant growth potential within a company that's at the forefront of wireless technology innovation. You'll be part of a team that develops cutting-edge GPU technologies while focusing on power efficiency - a critical aspect of modern semiconductor design. The position combines technical challenges with collaborative opportunities, requiring both deep technical expertise and strong team-working abilities.
Qualcomm provides an extensive benefits package, including world-class health coverage, financial planning support, and wellbeing programs. The company culture emphasizes innovation, professional growth, and work-life balance, making it an ideal environment for engineers looking to advance their careers while working on industry-leading technologies.
Responsibilities For ASIC Low power design engineer (GPU) -Staff
- Work on ASIC Low power Architecture and systems
- Perform power estimation and optimization using PTPX/Power Artist
- Implement hardware design using Verilog/System Verilog
- Conduct low power checks and leakage analysis
- Develop automation scripts for various processes
- Collaborate with cross-functional teams
Requirements For ASIC Low power design engineer (GPU) -Staff
- Bachelor's/Master's degree in Electrical/Electronics Engineering, Computer Science, or related field
- 6-8 years of experience in front end design
- Experience in Low power design with understanding of ASIC Low power Architecture
- Good understanding of Power Intent(UPF)
- Experience with hardware design (Verilog/System Verilog)
- Expertise on Conformal Low power check, PTPX, Leakage analysis, Power artist, Replay tools
- Good at scripting for automation Perl, Tcl, Python
- Ability to work with multiple cross functional teams
Benefits For ASIC Low power design engineer (GPU) -Staff
- World-class health coverage for employees and dependents
- Financial planning and future security programs
- Emotional/mental strength and resilience support
- Wellbeing programs
- Continuous learning and development programs
- Tuition reimbursement
- Mentorship opportunities
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